IDA Disassemblies Gallery

ARM Processor iOS (iPhone): Start

Assembler code
__text:00002274 __text:00002274 ; =============== S U B R O U T I N E ======================================= __text:00002274 __text:00002274 ; Attributes: noreturn bp-based frame __text:00002274 __text:00002274 sub_2274 ; CODE XREF: start+14↑p __text:00002274 __text:00002274 var_10 = -0x10 __text:00002274 __text:00002274 PUSH {R4-R7,LR} __text:00002278 ADD R7, SP, #0xC __text:0000227C SUB SP, SP, #4 __text:00002280 MOV R6, R0 __text:00002284 MOV R5, R1 __text:00002288 MOV R4, R2 __text:0000228C LDR R3, =(_NXArgc - 0x2298) __text:00002290 STR R0, [PC,R3] ; _NXArgc __text:00002294 LDR R3, =(_NXArgv - 0x22A0) __text:00002298 STR R1, [PC,R3] ; _NXArgv __text:0000229C LDR R3, =(_environ - 0x22A8) __text:000022A0 STR R2, [PC,R3] ; _environ __text:000022A4 LDR R3, =(_mach_init_routine_ptr - 0x22B0) __text:000022A8 LDR R3, [PC,R3] ; _mach_init_routine __text:000022AC LDR R3, [R3] __text:000022B0 CMP R3, #0 __text:000022B4 BLXNE R3 __text:000022B8 LDR R3, =(__cthread_init_routine_ptr - 0x22C4) __text:000022BC LDR R3, [PC,R3] ; __cthread_init_routine __text:000022C0 LDR R3, [R3] __text:000022C4 CMP R3, #0 __text:000022C8 BLXNE R3 __text:000022CC BL ___keymgr_dwarf2_register_sections __text:000022D0 BL sub_23C4 __text:000022D4 LDR R0, =(aDyldModTermFun - 0x22E0) ; "__dyld_mod_term_funcs" __text:000022D8 ADD R0, PC, R0 ; "__dyld_mod_term_funcs"