What’s New in IDA 9.2

-> 50+ new instructions from the TC1.8 architecture are now fully supported in the disassembler. This includes:

• Double-precision FPU instructions

• Virtualization instructions

• New Q (quad-sized) registers

-> Chipset definitions have been added for the following:

• TC1765

• TC1724

• TC1728

• TC1130

• and more…

These are used across the automotive and railway industries, including real-world train firmware.

-> Global address registers (A0, A1, A8, A9) can now be configured as segment registers.

TriCore uses these registers for global address computation—typically via GP-relative access.

You can now set them via Edit > Segments > Change segment register value… or by pressing Alt+G. This helps IDA resolve memory references more accurately during analysis.

Why It Matters

TriCore is widely used in safety-critical systems that keep our daily lives running smoothly - from the ECUs in modern vehicles to control units in railway networks. These embedded systems play a vital role in passenger safety, traffic coordination, and system reliability.

With this update, analysts working in automotive or transportation sectors can better understand and audit the firmware that underpins our global transit infrastructure.

Expanding support for architectures like this has been in our sights as a priority for 2025.

Behind the Scenes 

This update was heavily shaped by user demand (many requests have been made). 

Implementing chipset definitions like TC1765 or TC1724 wasn’t always smooth sailing: documentation for these parts can be sparse, outdated, or contain subtle inconsistencies. To ensure reliable behavior, we had to cross-reference and validate multiple sources.

Where You’ll Find It 

Just start analyzing TriCore code. 

To edit segment registers, go to Edit -> Segments -> Change segment register value… or press Alt+G.

TriCore is one of the processor modules that we continue to refine and extend in the near future, so be sure to stay tuned for more updates.