We know many of you needed nanoMIPS support in IDA. In fact, there is support for MIPS, and even some plugins do a decent job of disassembling and decompiling nanoMIPS, but…it was pretty clear that we should have it in IDA by default. Before we get to the point of this blog post, some of you might not be familiar with that architecture, and therefore, we will just briefly brush up on what nanoMIPS is and why there is so much fuss about having it in IDA.
nanoMIPS is a variant of the MIPS architecture designed for embedded devices. Although nanoMIPS and MIPS have many similarities, the nano version uses a unique instruction encoding that compresses operations into smaller memory footprints, which increases its efficiency in constrained environments but also introduces complexity for reverse engineers.
Here comes the great news! The MIPS disassembler and decompiler got added support for nanoMIPS instructions. They will be included in the upcoming IDA 9.0 release. As you probably know (or don’t), firmware compiled for nanoMIPS often ships in md1rom format, which is why we also added a md1rom file loader to IDA (which includes parsing and applying of debug symbols, if available). The nanoMIPS support is included in the classic MIPS (HEXMIPS) decompiler, so if you already have the MIPS decompiler, you won’t need an additional decompiler.
Enough talking. Let’s look at some screenshots and see how IDA 9.0 deals with nanoMIPS:
This enhancement, introduced with the September 30th release of IDA Pro 9.0, sets the stage for even more sophisticated features in the future as IDA Pro continues to evolve alongside the complexity of modern software development.
